Joint REASON project tutorials and other events will be held mainly in parallel with the Conference on the following dates:

Thursday, September 11, 2003:
  • "Analog and RF IC Design" Tutorial
  • Testing Tools Workshop

  • Friday, September 12, 2003:
  • “MOEMS Design and Applications“ Tutorial
  • "Defect-oriented Test of Integrated Circuits and Systems" Tutorial

  • Saturday, September 13, 2003:
  • “Microelectronic and Microsystem Design” student contest

  • Tutorials and others events are organized under EU funded project REASON.
    Interested persons are encouraged to attend any event for free.

    10:00 - 10:45
    Methods of Analysis of Nonlinear RF Circuits and Systems in CAD Tools
    Vladimir Lantsov, Alexander Merkutov, VSTU Vladimir, Russia

    10:45 - 11:10
    Coffee break

    11:10 - 11:50
    Propagation Problems in Interconnections
    Elzbieta Piwowarska, WUT Warsaw, Poland

    11:50 - 13:00
    Design for manufacturability: How to account for manufacturing imperfections in VLSI design
    Wieslaw Kuzmicz, Zbigniew Jaworski, WUT Warsaw, Poland

    10:00 - 10:30
    Thin Films - a Tool for the Integration of Micro- and Nano-sensor Technologies
    Vladimir Tvarozek, FEI STU Bratislava, Slovakia

    10:30 - 11:00
    Vladimir Ac, FM TnUAD, Trencin, Slovakia

    11:00 - 11:30
    Ivan Kneppo, FM TnUAD, Trencin, Slovakia

    11:30 - 12:00
    Coffee break

    12:00 - 12:30
    Intelligent MEMS
    Anton Vitko, FME STU, Bratislava, Slovakia

    12:30 - 13:00
    MOEMS for Optical Communications
    Ivan Plander, FM TnUAD, Trencin, Slovakia

    14:00 - 15:00
    Some defects properties in nanometer ICs
    Jaume Segura, Universitat de les Illes Balears, Spain

    15:00 - 15:40
    Defect analysis and probability evaluation for improving test generation
    Witold Pleskacz, TU Warsaw, Poland

    15:40 - 16:00
    Coffee break

    16:00 - 16:40
    Defect-oriented test generation
    Elena Gramatova, Institute of Informatics, Bratislava, Slovakia

    16:40 - 17:20
    Hierarchical test generation and fault simulation
    Raimund Ubar, TU Tallinn, Estonia

    17:20 - 18:00
    Alternative test methods for defect monitoring and measurement
    Viera Stopjakova, Slovak TU, Bratislava, Slovakia

    The event is organized as a parallel special session to the technical ECS’03 conference
    programme. The main goal of this session is to present and demonstrate tools developed
    and/or used in the testing and design fields(in the frame of the IST-2000-30193 Reason
    project - Research and training Action for System on Chip Design).


    Welcome address: Elena Gramatová, Institute of Informatics, Bratislava, Slovakia

    Chair: Dieter Wuttke, Ilmenau University of Technology, Germany

    14:00 - 14:30
    Dieter Wuttke: Web-based training tools - A collection of "Living Pictures" and remote tools for leading Basics in Digital Design and Test
    Ilmenau University of Technology, Germany

    14:30 - 15:00
    Wieslaw Kuzmicz: Virtual prototyping via Internet of IC designs
    Warsaw University of Technology, Poland

    15:00 - 15:30
    Raimund Ubar, Artur Jutman: E-learning environment for digital test: Applets and PC-based tools
    Tallinn Technical University, Estonia

    15:30 - 15:50 Coffee break

    Chair: Raimund Ubar, Tallinn Technical University, Estonia

    15:50 - 16:10
    Tomáš Pikula: Java applet for BIST construction for digital systems
    Institute of Informatics, Bratislava, Slovakia

    16:10 - 16:30
    Marcel Baláž: Java applet for test wraper application for digital systems
    Institute of Informatics, Bratislava, Slovakia

    16:30 - 17:00
    Vacius Jusas: Online test synthesis tool
    Kaunas Technical University, Lithuania

    17:00 - 17:20
    Elena Gramatová: DefGen ATPG system
    Institute of Informatics, Bratislava, Slovakia

    17:20 - 18:20
    WP3-WP8 fringe meeting (for the Reason project partners)

    Oral Presentations

    MSc. Projects

    9:00 - 10:00

    Babic Domagoj, University of Zagreb, Croatia
    “Polynomial Transform Based DCT Implementation”

    Finc Matjaz, UoL Ljubljana, Slovenia
    “A Softcore CPU Based FPGA Platform for HW/SW Co-design of Imaging Applications”

    Kudin Kirill, BSUIR Minsk, Belarus
    “Design and Simulation via Internet”

    Plotnikov Pavel, Lobachev Gleb, VSTU Vladimir, Russia
    “Computer-Aided Design Subsystem of Multi-Channel Quadrature Delimiters on XILINX FPGA”

    PhD. Projects

    10:00 - 10:45

    Dodeva Gergana N., Ph.D., Antonova Olga J., M.Sc., Pukneva Diana I., M.Sc., TUS Sofia, Bulgaria
    “Analysis and Design of Class E and Class DE Power Amplifiers and Monolithic Inductors for Wireless Applications”

    Donchev Blagomir R., TUS Sofia, Bulgaria
    “Investigation and Design of Specialized Integrated Circuits with FPGA Matrix”

    Galichev Evgeny, VSTU Vladimir, Russia
    “Universal Compact Low-Power Protoboard with Reconfigurable Architecture for Digital Signal Processing”

    10:45 - 11:00
    Coffee break

    11:00 - 12:30

    Jankowski Mariusz, TUL Lodz, Poland
    “Realisation of Switched-Current Integrated Circuit Using Modified Design-Path”

    Matej Marek, FEI STU Bratislava, Slovakia
    “"An Analog Memory Cell Design in the Standard CMOS Process"

    Mihaylova Cristy N., TUS Sofia, Bulgaria
    “Design of Low Power Supply Temperature Independent DC Biasing Circuits”

    Szermer Michal, TUL Lodz, Poland
    “Modular Structure of Sigma-Delta Analogue to Digital Converter”

    Tikovic Pavol, FEI STU Bratislava, Slovakia
    “Creating a Positioning Device Using an Integrate and Fire Neural Network”

    Verderber Matjaz, UoL Ljubljana, Slovenia
    “New Approach in Integrated Circuit Design”

    12:30 - 13:30

    13:30 - 15:00
    Poster presentations, demonstrations